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EUROMICRO
1999
IEEE
13 years 10 months ago
Design Space Exploration in System Level Synthesis under Memory Constraints
This paper addresses the problem of component selection, task assignment and task scheduling for distributed embedded computer systems. Such systems have a large number of constra...
Radoslaw Szymanek, Krzysztof Kuchcinski
ASPDAC
2008
ACM
94views Hardware» more  ASPDAC 2008»
13 years 8 months ago
Robust on-chip bus architecture synthesis for MPSoCs under random tasks arrival
A major trend in a modern system-on-chip design is a growing system complexity, which results in a sharp increase of communication traffic on the on-chip communication bus architec...
Sujan Pandey, Rolf Drechsler
HIPC
2003
Springer
13 years 11 months ago
Dynamic Load Balancing for I/O-Intensive Tasks on Heterogeneous Clusters
1 Since I/O-intensive tasks running on a heterogeneous cluster need a highly effective usage of global I/O resources, previous CPUor memory-centric load balancing schemes suffer ...
Xiao Qin, Hong Jiang, Yifeng Zhu, David R. Swanson
RTSS
1992
IEEE
13 years 10 months ago
Allocation of periodic task modules with precedence and deadline constraints in distributed real-time systems
This paper addresses the problem of allocating (assigning and scheduling) periodic task modules to processing nodes in distributed real-time systems subject to task precedence and ...
Chao-Ju Hou, Kang G. Shin
IJCAI
2001
13 years 7 months ago
Adaptive Control of Acyclic Progressive Processing Task Structures
The progressive processing model allows a system to trade off resource consumption against the quality of the outcome by mapping each activity to a graph of potential solution met...
Stéphane Cardon, Abdel-Illah Mouaddib, Shlo...