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PET
2004
Springer
15 years 6 months ago
Synchronous Batching: From Cascades to Free Routes
The variety of possible anonymity network topologies has spurred much debate in recent years. In a synchronous batching design, each batch of messages enters the mix network togeth...
Roger Dingledine, Vitaly Shmatikov, Paul F. Syvers...
ITNG
2007
IEEE
15 years 7 months ago
On Design and Analysis of a Feasible Network-on-Chip (NoC) Architecture
In this paper, we present several enhanced network techniques which are appropriate for VLSI implementation and have reduced complexity, high throughput, and simple routing algori...
Jun Ho Bahn, Seung Eun Lee, Nader Bagherzadeh
FPGA
1995
ACM
149views FPGA» more  FPGA 1995»
15 years 4 months ago
PathFinder: A Negotiation-based Performance-driven Router for FPGAs
Routing FPGAs is a challenging problem because of the relative scarcity of routing resources, both wires and connection points. This can lead either to slow implementations caused...
Larry McMurchie, Carl Ebeling
POPL
2002
ACM
16 years 1 months ago
Towards automatic construction of staged compilers
Some compilation systems, such as offline partial evaluators and selective dynamic compilation systems, support staged optimizations. A staged optimization is one where a logicall...
Matthai Philipose, Craig Chambers, Susan J. Eggers
JOTA
2010
144views more  JOTA 2010»
14 years 8 months ago
On a PDE Arising in One-Dimensional Stochastic Control Problems
The paper provides a systematic way for finding a partial differential equation that directly characterizes the optimal control, in the framework of one
Ricardo Josa-Fombellida, Juan Pablo Rincón-...