2926 search results - page 277 / 586 » Partially Optimal Routing |
156
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ICCAD
1999
IEEE
15 years 8 months ago
1999
IEEE
We consider the problem of finding an optimal clock schedule, i.e. optimal arrival times for clock signals at latches of a VLSI chip. We describe a general model which includes al...
130
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ANOR
2010
15 years 2 months ago
2010
This paper considers online stochastic optimization problems where uncertainties are characterized by a distribution that can be sampled and where time constraints severely limit t...
137
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EVOW
2009
Springer
15 years 11 months ago
2009
Springer
The Learnable Evolution Model (LEM) involves alternating periods of optimization and learning, performa extremely well on a range of problems, a specialises in achieveing good resu...
137
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ISQED
2002
IEEE
15 years 9 months ago
2002
IEEE
As the process technology advances into the deep submicron era, interconnect plays a dominant role in determining circuit performance. Buffer insertion/sizing and wire sizing are ...
158
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VLSID
2002
IEEE
15 years 9 months ago
2002
IEEE
We propose a timing-oriented logic optimization technique called Generalized De Morgan (GDM) transform, that integrates gate resizing, net buffering and De Morgan transformation. ...