2926 search results - page 279 / 586 » Partially Optimal Routing |
149
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GLOBECOM
2007
IEEE
15 years 10 months ago
2007
IEEE
Abstract— This paper theoretically analyzes cross-layer optimized design of transmit power allocation in distributed interference-limited wireless networks with asynchronously ac...
138
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ICW
2005
IEEE
15 years 9 months ago
2005
IEEE
Most sensor network applications require quality of service guarantees on a network-wide basis, suggesting the need for global network cost optimization. The dynamic and nonunifor...
152
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ASPDAC
2004
ACM
15 years 9 months ago
2004
ACM
As the process technology advances into the deep submicron era, interconnect plays a dominant role in determining circuit performance and signal integrity. Buffer insertion is one...
120
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ISVLSI
2003
IEEE
15 years 9 months ago
2003
IEEE
The “chicken-egg” dilemma between VLSI interconnect timing optimization and delay calculation suggests an iterative approach. We separate interconnect timing transformation as...
131
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VLSID
1999
IEEE
15 years 8 months ago
1999
IEEE
Interconnect tuning and repeater insertion are necessary to optimize interconnectdelay, signalperformanceandintegrity, andinterconnectmanufacturability and reliability. Repeater i...