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GECCO
2010
Springer
233views Optimization» more  GECCO 2010»
15 years 8 months ago
Evolutionary-based conflict-free scheduling of collective communications on spidergon NoCs
The Spidergon interconnection network has become popular recently in multiprocessor systems on chips. To the best of our knowledge, algorithms for collective communications (CC) h...
Jirí Jaros, Vaclav Dvorak
ISPD
1999
ACM
127views Hardware» more  ISPD 1999»
15 years 7 months ago
Buffer insertion for clock delay and skew minimization
 Buffer insertion is an effective approach to achieve both minimal clock signal delay and skew in high speed VLSI circuit design. In this paper, we develop an optimal buffer ins...
X. Zeng, D. Zhou, Wei Li
DAC
1997
ACM
15 years 7 months ago
Wire Segmenting for Improved Buffer Insertion
Buffer insertion seeks to place buffers on the wires of a signal net to minimize delay. Van Ginneken [14] proposed an optimal dynamic programming solution (with extensions propose...
Charles J. Alpert, Anirudh Devgan
GECCO
2006
Springer
191views Optimization» more  GECCO 2006»
15 years 6 months ago
The Brueckner network: an immobile sorting swarm
In many industrial applications, the dynamic control of queuing and routing presents difficult challenges. We describe a novel ant colony control system for a multiobjective sorti...
William A. Tozier, Michael R. Chesher, Tejinderpal...
CHES
2003
Springer
146views Cryptology» more  CHES 2003»
15 years 6 months ago
Efficient Implementation of Rijndael Encryption in Reconfigurable Hardware: Improvements and Design Tradeoffs
Abstract. Performance evaluation of the Advanced Encryption Standard candidates has led to intensive study of both hardware and software implementations. However, although plentifu...
François-Xavier Standaert, Gaël Rouvro...