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DAC
2005
ACM
16 years 4 months ago
Device and architecture co-optimization for FPGA power reduction
Device optimization considering supply voltage Vdd and threshold voltage Vt tuning does not increase chip area but has a great impact on power and performance in the nanometer tec...
Lerong Cheng, Phoebe Wong, Fei Li, Yan Lin, Lei He
ICCAD
2007
IEEE
111views Hardware» more  ICCAD 2007»
16 years 15 hour ago
Exploiting STI stress for performance
— Starting at the 65nm node, stress engineering to improve performance of transistors has been a major industry focus. An intrinsic stress source – shallow trench isolation –...
Andrew B. Kahng, Puneet Sharma, Rasit Onur Topalog...
INFOCOM
2009
IEEE
15 years 9 months ago
Graceful Network Operations
—A significant fraction of network events (such as topology or route changes) and the resulting performance degradation stem from premeditated network management and operational...
Saqib Raza, Yuanchen Zhu, Chen-Nee Chuah
SIGCOMM
2009
ACM
15 years 9 months ago
Economic issues in shared infrastructures
We define some interesting incentive issues that arise in the management of virtual infrastructures. We demonstrate that participants’ decisions about the quantities of infrast...
Costas Courcoubetis, Richard R. Weber
CISS
2008
IEEE
15 years 9 months ago
Rate adaptation via link-layer feedback for goodput maximization over a time-varying channel
Abstract—We consider adapting the transmission rate to maximize the goodput, i.e., the amount of data transmitted without error, over a continuous Markov flat-fading wireless ch...
Rohit Aggarwal, Phil Schniter, Can Emre Koksal