2926 search results - page 548 / 586 » Partially Optimal Routing |
97
Voted
DAC
2009
ACM
16 years 1 months ago
2009
ACM
In this paper, we propose an effective algorithm flow to handle largescale mixed-size placement. The basic idea is to use floorplanning to guide the placement of objects at the gl...
DAC
2008
ACM
16 years 1 months ago
2008
ACM
In this paper, we present ELIAD, an efficient lithography aware detailed router to optimize silicon image after optical proximity correction (OPC) in a correct-by-construction man...
86
Voted
DAC
2006
ACM
16 years 1 months ago
2006
ACM
As a prevalent constraint, sharp slew rate is often required in circuit design which causes a huge demand for buffering resources. This problem requires ultra-fast buffering techn...
99
Voted
STOC
2001
ACM
16 years 29 days ago
2001
ACM
Consider a setting in which a group of nodes, situated in a large underlying network, wishes to reserve bandwidth on which to support communication. Virtual private networks (VPNs...
ICCAD
2005
IEEE
15 years 9 months ago
2005
IEEE
— Although the LUT (look-up table) size of FPGAs has been optimized for general applications, complicated designs may contain a large number of cascaded LUTs between flip-flops...