28 search results - page 3 / 6 » Partitioned Schedules for Clustered VLIW Architectures |
CASES
2001
ACM
13 years 10 months ago
2001
ACM
In this paper we describe a design exploration methodology for clustered VLIW architectures. The central idea of this work is a set of three techniques aimed at reducing the cost ...
IEEEPACT
2002
IEEE
13 years 11 months ago
2002
IEEE
Modern embedded systems often require high degrees of instruction-level parallelism (ILP) within strict constraints on power consumption and chip cost. Unfortunately, a high-perfo...
DATE
2005
IEEE
14 years 1 hour ago
2005
IEEE
With new sophisticated compiler technology, it is possible to schedule distant instructions efficiently. As a consequence, the amount of exploitable instruction level parallelism...
PLDI
2003
ACM
13 years 11 months ago
2003
ACM
Clustered architectures are a solution to the bottleneck of centralized register files in superscalar and VLIW processors. The main challenge associated with clustered architectu...
VLSISP
2008
13 years 6 months ago
2008
The compiler is generally regarded as the most important software component that supports a processor design to achieve success. This paper describes our application of the open re...