338 search results - page 34 / 68 » Partitioning of VLSI Circuits and Systems |
VLSID
2000
IEEE
15 years 2 months ago
2000
IEEE
The test signal method can be used to measure and model inductance parameters (self and mutual) of a very small interconnect especially in highdensity IC’s by using a test signa...
69
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ARVLSI
1997
IEEE
15 years 1 months ago
1997
IEEE
The growing gap between on-chip gates and off-chip I/O bandwidth argues for ever larger amounts of on-chip memory. Emerging portable consumer technology, such as digital cameras, ...
109
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GLVLSI
2009
IEEE
14 years 7 months ago
2009
IEEE
Distributing power and ground to a vertically integrated system is a complex and difficult task. Interplane communication and power delivery are achieved by through silicon vias (...
DFT
1999
IEEE
15 years 2 months ago
1999
IEEE
The inherent redundancy and in-the-field reconfiguration capabilities of field programmable gate arrays (FPGAs) provide alternatives to integrated circuit redundancy-based fault r...
DDECS
2007
IEEE
15 years 4 months ago
2007
IEEE
: As scan compression replaces the traditional scan it is important to understand how it works with power. DFT MAX represents one of the two primary scan compression solutions used...