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» Partitioning of VLSI Circuits and Systems
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110
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GLVLSI
2009
IEEE
189views VLSI» more  GLVLSI 2009»
15 years 4 months ago
High-performance, cost-effective heterogeneous 3D FPGA architectures
In this paper, we propose novel architectural and design techniques for three-dimensional field-programmable gate arrays (3D FPGAs) with Through-Silicon Vias (TSVs). We develop a...
Roto Le, Sherief Reda, R. Iris Bahar
86
Voted
ISCAS
2003
IEEE
189views Hardware» more  ISCAS 2003»
15 years 3 months ago
Bio-inspired optical flow circuits for the visual guidance of micro air vehicles
In 1986, Franceschini et al. built an optronic velocity sensor [11], the principle of which was based on the findings they had recently made on fly EMDs by performing electrophysio...
Franck Ruffier, Stéphane Viollet, S. Amic, ...
FPGA
2008
ACM
161views FPGA» more  FPGA 2008»
14 years 11 months ago
Implementing high-speed string matching hardware for network intrusion detection systems
This paper presents high-throughput techniques for implementing FSM based string matching hardware on FPGAs. By taking advantage of the fact that string matching operations for di...
Atul Mahajan, Benfano Soewito, Sai K. Parsi, Ning ...
DATE
2003
IEEE
102views Hardware» more  DATE 2003»
15 years 3 months ago
Power Constrained High-Level Synthesis of Battery Powered Digital Systems
We present a high-level synthesis algorithm solving the combined scheduling, allocation and binding problem minimizing area under both latency and maximum power per clock-cycle co...
S. F. Nielsen, Jan Madsen
GECCO
2003
Springer
120views Optimization» more  GECCO 2003»
15 years 2 months ago
Multi-FPGA Systems Synthesis by Means of Evolutionary Computation
Abstract. Multi-FPGA systems (MFS) are used for a great variety of applications, for instance, dynamically re-configurable hardware applications, digital circuit emulation, and num...
José Ignacio Hidalgo, Francisco Ferná...