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» Partitioning of VLSI Circuits and Systems
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ISLPED
2000
ACM
99views Hardware» more  ISLPED 2000»
15 years 2 months ago
Practical considerations of clock-powered logic
Recovering and reusing circuit energies that would otherwise be dissipated as heat can reduce the power dissipated by a VLSI chip. To accomplish this requires a power source that ...
William C. Athas
VLSID
2002
IEEE
124views VLSI» more  VLSID 2002»
15 years 10 months ago
Efficient Approximate Balanced Truncation of General Large-Scale RLC Systems via Krylov Methods
We present an efficient implementation of an approximate balanced truncation model reduction technique for general large-scale RLC systems, described by a statespace model where t...
Q. Su, Venkataramanan Balakrishnan, Cheng-Kok Koh
GLVLSI
2002
IEEE
106views VLSI» more  GLVLSI 2002»
15 years 2 months ago
A low power direct digital frequency synthesizer with 60 dBc spectral purity
We present a low-power sine-output Direct Digital Frequency Synthesizer (DDFS) realized in 0.18 µm CMOS that achieves 60 dBc spectral purity from DC to the Nyquist frequency. No ...
J. M. Pierre Langlois, Dhamin Al-Khalili
GLVLSI
2003
IEEE
132views VLSI» more  GLVLSI 2003»
15 years 3 months ago
Power-aware pipelined multiplier design based on 2-dimensional pipeline gating
Power-awareness indicates the scalability of the system energy with changing conditions and quality requirements. Multipliers are essential elements used in DSP applications and c...
Jia Di, Jiann S. Yuan
GLVLSI
2005
IEEE
124views VLSI» more  GLVLSI 2005»
15 years 3 months ago
SOFTENIT: a methodology for boosting the software content of system-on-chip designs
Embedded software is a preferred choice for implementing system functionality in modern System-on-Chip (SoC) designs, due to the high flexibility, and lower engineering costs pro...
Abhishek Mitra, Marcello Lajolo, Kanishka Lahiri