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» Partitioning of VLSI Circuits and Systems
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DAC
2002
ACM
15 years 10 months ago
HiPRIME: hierarchical and passivity reserved interconnect macromodeling engine for RLKC power delivery
This paper proposes a general hierarchical analysis methodology, HiPRIME, to efficiently analyze RLKC power delivery systems. After partitioning the circuits into blocks, we devel...
Yahong Cao, Yu-Min Lee, Tsung-Hao Chen, Charlie Ch...
VLSID
2007
IEEE
210views VLSI» more  VLSID 2007»
15 years 10 months ago
Dynamically Optimizing FPGA Applications by Monitoring Temperature and Workloads
In the past, Field Programmable Gate Array (FPGA) circuits only contained a limited amount of logic and operated at a low frequency. Few applications running on FPGAs consumed exc...
Phillip H. Jones, Young H. Cho, John W. Lockwood
EUROGP
2009
Springer
105views Optimization» more  EUROGP 2009»
15 years 2 months ago
Quantum Circuit Synthesis with Adaptive Parameters Control
The contribution presented herein proposes an adaptive genetic algorithm applied to quantum logic circuit synthesis that, dynamically adjusts its control parameters. The adaptation...
Cristian Ruican, Mihai Udrescu, Lucian Prodan, Mir...
VLSID
2001
IEEE
179views VLSI» more  VLSID 2001»
15 years 10 months ago
Low-Power Wireless Sensor Networks
- Wireless distributed microsensor systems will enable fault tolerant monitoring and control of a variety of applications. Due to the large number of microsensor nodes that may be ...
Rex Min, Manish Bhardwaj, Seong-Hwan Cho, Eugene S...
VLSID
1999
IEEE
139views VLSI» more  VLSID 1999»
15 years 1 months ago
Processor Modeling for Hardware Software Codesign
In hardware - software codesign paradigm often a performance estimation of the system is needed for hardware - software partitioning. The tremendous growth of application specific...
V. Rajesh, Rajat Moona