338 search results - page 50 / 68 » Partitioning of VLSI Circuits and Systems |
DAC
2002
ACM
15 years 10 months ago
2002
ACM
The ability to compute the parasitic inductance of the interconnect is critical to the timing verification of modern VLSI circuits. A challenging aspect of inductance extraction i...
ICCAD
2008
IEEE
15 years 6 months ago
2008
IEEE
— In today’s VLSI designs, there can be many blockages in a routing region. The obstacle-avoiding rectilinear Steiner minimum tree (OARSMT) problem has become an important prob...
DAC
2009
ACM
15 years 4 months ago
2009
ACM
For a computing system to be trusted, it is equally important to verify that the system performs no more and no less functionalities than desired. Traditional testing and verifica...
DSD
2010
IEEE
14 years 7 months ago
2010
IEEE
We present a high-level synthesis flow for mapping an algorithm description (in C) to a provably equivalent registertransfer level (RTL) description of hardware. This flow uses an ...
SBCCI
2006
ACM
15 years 3 months ago
2006
ACM
Platform-based design is a method to implement complex SoCs, avoiding chip design from scratch. A promising evolution of platform-based design are MPSoC. Such generic architecture...