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VLSID
2006
IEEE
183views VLSI» more  VLSID 2006»
15 years 3 months ago
Design Challenges for High Performance Nano-Technology
This tutorial present the key aspects of design challenges and its solutions that are being experienced in VLSI design in the era of nano technology. The focus will be on design c...
Goutam Debnath, Paul J. Thadikaran
IEEEHPCS
2010
14 years 8 months ago
CuHMMer: A load-balanced CPU-GPU cooperative bioinformatics application
Abstract—GPUs have recently been used to accelerate dataparallel applications for they provide easier programmability and increased generality while maintaining the tremendous me...
Ping Yao, Hong An, Mu Xu, Gu Liu, Xiaoqiang Li, Ya...
DAC
2006
ACM
15 years 10 months ago
Optimality study of resource binding with multi-Vdds
Deploying multiple supply voltages (multi-Vdds) on one chip is an important technique to reduce dynamic power consumption. In this work we present an optimality study for resource...
Deming Chen, Jason Cong, Yiping Fan, Junjuan Xu
HIPEAC
2009
Springer
15 years 4 months ago
Adapting Application Mapping to Systematic Within-Die Process Variations on Chip Multiprocessors
Process variations, which lead to timing and power variations across identically-designed components, have been identified as one of the key future design challenges by the semico...
Yang Ding, Mahmut T. Kandemir, Mary Jane Irwin, Pa...
DATE
2006
IEEE
104views Hardware» more  DATE 2006»
15 years 3 months ago
Integrated placement and skew optimization for rotary clocking
—The clock distribution network is a key component of any synchronous VLSI design. High power dissipation and pressure volume temperature-induced variations in clock skew have st...
Ganesh Venkataraman, Jiang Hu, Frank Liu, Cliff C....