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LCTRTS
2001
Springer
15 years 6 months ago
A Dynamic Programming Approach to Optimal Integrated Code Generation
Phase-decoupled methods for code generation are the state of the art in compilers for standard processors but generally produce code of poor quality for irregular target architect...
Christoph W. Keßler, Andrzej Bednarski
HPCA
2000
IEEE
15 years 6 months ago
Impact of Chip-Level Integration on Performance of OLTP Workloads
With increasing chip densities, future microprocessor designs have the opportunity to integrate many of the traditional systemlevel modules onto the same chip as the processor. So...
Luiz André Barroso, Kourosh Gharachorloo, A...
ICDCSW
2000
IEEE
15 years 6 months ago
Enabling Flexible QoS Support in the Object Request Broker COOL
Support of end-to-end Quality-of-Service (QoS) and ate high-level programming abstractions are two crucial factors for the development of future telecommunication services and dis...
Tom Kristensen, Thomas Plagemann
ISCA
2000
IEEE
107views Hardware» more  ISCA 2000»
15 years 6 months ago
A fully associative software-managed cache design
As DRAM access latencies approach a thousand instructionexecution times and on-chip caches grow to multiple megabytes, it is not clear that conventional cache structures continue ...
Erik G. Hallnor, Steven K. Reinhardt
MSS
2000
IEEE
72views Hardware» more  MSS 2000»
15 years 6 months ago
The InTENsity PowerWall: A Case Study for a Shared File System Testing Framework
The InTENsity PowerWall is a display system used for high-resolution visualization of very large volumetric data sets. The display is linked to two separate computing environments...
Alex W. Elder, Thomas Ruwart, Benjamin D. Allen, A...