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FCCM
1997
IEEE
103views VLSI» more  FCCM 1997»
15 years 9 months ago
An FPGA architecture for DRAM-based systolic computations
We propose an FPGA chip architecture based on a conventional FPGA logic array core, in which I/O pins are clocked at a much higher rate than that of the logic array that they serv...
Norman Margolus
DAC
1997
ACM
15 years 9 months ago
COSYN: Hardware-Software Co-Synthesis of Embedded Systems
: Hardware-software co-synthesis is the process of partitioning an embedded system specification into hardware and software modules to meet performance, power and cost goals. In t...
Bharat P. Dave, Ganesh Lakshminarayana, Niraj K. J...
CIKM
2006
Springer
15 years 8 months ago
Mining compressed commodity workflows from massive RFID data sets
Radio Frequency Identification (RFID) technology is fast becoming a prevalent tool in tracking commodities in supply chain management applications. The movement of commodities thr...
Hector Gonzalez, Jiawei Han, Xiaolei Li
178
Voted
ISSS
1995
IEEE
161views Hardware» more  ISSS 1995»
15 years 8 months ago
Synthesis of pipelined DSP accelerators with dynamic scheduling
To construct complete systems on silicon, application speci c DSP accelerators are needed to speed up the execution of high throughput DSP algorithms. In this paper, a methodology...
Patrick Schaumont, Bart Vanthournout, Ivo Bolsens,...
JSAC
2010
135views more  JSAC 2010»
15 years 3 months ago
Provisioning mission-critical telerobotic control systems over internet backbone networks with essentially-perfect QoS
—Over the next decades, the Internet will evolve to support increasingly complex mission-critical services such as telerobotically controlled surgery. The world’s first telero...
T. H. Szymanski, D. Gilbert