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ASPDAC
2006
ACM
130views Hardware» more  ASPDAC 2006»
15 years 8 months ago
Convergence-provable statistical timing analysis with level-sensitive latches and feedback loops
Statistical timing analysis has been widely applied to predict the timing yield of VLSI circuits when process variations become significant. Existing statistical latch timing met...
Lizheng Zhang, Jeng-Liang Tsai, Weijen Chen, Yuhen...
92
Voted
DATE
2005
IEEE
107views Hardware» more  DATE 2005»
15 years 8 months ago
On Statistical Timing Analysis with Inter- and Intra-Die Variations
In this paper, we highlight a fast, effective and practical statistical approach that deals with inter and intra-die variations in VLSI chips. Our methodology is applied to a numb...
Hratch Mangassarian, Mohab Anis
ICDAR
2005
IEEE
15 years 8 months ago
A Model for Detecting and Merging Vertically Spanned Table Cells in Plain Text Documents
A spanned cell in a table is a single, complete unit that physically occupies multiple columns and/or multiple rows. Spanned cells are common in tables, and they are a significan...
Vanessa Long, Robert Dale, Steve Cassidy
ICDM
2005
IEEE
187views Data Mining» more  ICDM 2005»
15 years 8 months ago
Parallel Algorithms for Distance-Based and Density-Based Outliers
An outlier is an observation that deviates so much from other observations as to arouse suspicion that it was generated by a different mechanism. Outlier detection has many applic...
Elio Lozano, Edgar Acuña
ICRA
2005
IEEE
128views Robotics» more  ICRA 2005»
15 years 8 months ago
Behavior-Grounded Representation of Tool Affordances
Abstract— This paper introduces a novel approach to representing and learning tool affordances by a robot. The tool representation described here uses a behavior-based approach t...
Alexander Stoytchev