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ITC
1997
IEEE
129views Hardware» more  ITC 1997»
15 years 6 months ago
On Using Machine Learning for Logic BIST
This paper presents a new approach for designing test sequences to be generated on–chip. The proposed technique is based on machine learning, and provides a way to generate effi...
Christophe Fagot, Patrick Girard, Christian Landra...
ATS
2009
IEEE
117views Hardware» more  ATS 2009»
15 years 9 months ago
N-distinguishing Tests for Enhanced Defect Diagnosis
Diagnostic ATPG has traditionally been used to generate test patterns that distinguish pairs of modeled faults. In this work, we investigate the use of n-distinguishing test sets,...
Gang Chen, Janusz Rajski, Sudhakar M. Reddy, Irith...
VTS
2000
IEEE
95views Hardware» more  VTS 2000»
15 years 6 months ago
DEFUSE: A Deterministic Functional Self-Test Methodology for Processors
1 At-speed testing is becoming increasingly difficult with external testers as the speed of microprocessors approaches the GHz range. One solution to this problem is built-in self-...
Li Chen, Sujit Dey
SOUPS
2009
ACM
15 years 8 months ago
Games for extracting randomness
Randomness is a necessary ingredient in various computational tasks and especially in Cryptography, yet many existing mechanisms for obtaining randomness suffer from numerous pro...
Ran Halprin, Moni Naor
LOGCOM
2007
89views more  LOGCOM 2007»
15 years 2 months ago
Algorithmic Randomness of Closed Sets
We investigate notions of randomness in the space C[2N ] of nonempty closed subsets of {0, 1}N . A probability measure is given and a version of the Martin-L¨of test for randomne...
George Barmpalias, Paul Brodhead, Douglas Cenzer, ...