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DSD
2010
IEEE
161views Hardware» more  DSD 2010»
14 years 10 months ago
Design of Trace-Based Split Array Caches for Embedded Applications
—Since many embedded systems execute a predefined set of programs, tuning system components to application programs and data is the approach chosen by many design techniques to o...
Alice M. Tokarnia, Marina Tachibana
FGCS
2006
119views more  FGCS 2006»
14 years 9 months ago
OpenMP versus MPI for PDE solvers based on regular sparse numerical operators
Tw o parallel programming models represented b y OpenMP and MPI are compared for PDE solvers based on regular sparse numerical operators. As a typical representative of such an app...
Markus Nordén, Sverker Holmgren, Michael Th...
ISCA
2008
IEEE
143views Hardware» more  ISCA 2008»
14 years 9 months ago
TokenTM: Efficient Execution of Large Transactions with Hardware Transactional Memory
Current hardware transactional memory systems seek to simplify parallel programming, but assume that large transactions are rare, so it is acceptable to penalize their performance...
Jayaram Bobba, Neelam Goyal, Mark D. Hill, Michael...
JCST
2008
114views more  JCST 2008»
14 years 9 months ago
Synthesizing Service Composition Models on the Basis of Temporal Business Rules
Transformational approaches to generating design and implementation models from requirements can bring effectiveness and quality to software development. In this paper we present a...
Jian Yu, Yanbo Han, Jun Han, Yan Jin, Paolo Falcar...
JPDC
2008
167views more  JPDC 2008»
14 years 9 months ago
A performance study of general-purpose applications on graphics processors using CUDA
Graphics processors (GPUs) provide a vast number of simple, data-parallel, deeply multithreaded cores and high memory bandwidths. GPU architectures are becoming increasingly progr...
Shuai Che, Michael Boyer, Jiayuan Meng, David Tarj...