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PPOPP
2010
ACM
15 years 4 months ago
Load balancing on speed
To fully exploit multicore processors, applications are expected to provide a large degree of thread-level parallelism. While adequate for low core counts and their typical worklo...
Steven Hofmeyr, Costin Iancu, Filip Blagojevic
CCGRID
2009
IEEE
15 years 4 months ago
Natively Supporting True One-Sided Communication in
As high-end computing systems continue to grow in scale, the performance that applications can achieve on such large scale systems depends heavily on their ability to avoid explic...
Gopalakrishnan Santhanaraman, Pavan Balaji, K. Gop...
IEEEPACT
2009
IEEE
15 years 4 months ago
Quantifying the Potential of Program Analysis Peripherals
Abstract—As programmers are asked to manage more complicated parallel machines, it is likely that they will become increasingly dependent on tools such as multi-threaded data rac...
Mohit Tiwari, Shashidhar Mysore, Timothy Sherwood
IEEEPACT
2009
IEEE
15 years 4 months ago
StealthTest: Low Overhead Online Software Testing Using Transactional Memory
—Software testing is hard. The emergence of multicore architectures and the proliferation of bugprone multithreaded software makes testing even harder. To this end, researchers h...
Jayaram Bobba, Weiwei Xiong, Luke Yen, Mark D. Hil...
CASES
2009
ACM
15 years 4 months ago
A buffer replacement algorithm exploiting multi-chip parallelism in solid state disks
Solid State Disks (SSDs) are superior to magnetic disks from a performance point of view due to the favorable features of NAND flash memory. Furthermore, thanks to improvement on...
Jinho Seol, Hyotaek Shim, Jaegeuk Kim, Seungryoul ...