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HPCA
2009
IEEE
15 years 10 months ago
Design and evaluation of a hierarchical on-chip interconnect for next-generation CMPs
Performance and power consumption of an on-chip interconnect that forms the backbone of Chip Multiprocessors (CMPs), are directly influenced by the underlying network topology. Bo...
Reetuparna Das, Soumya Eachempati, Asit K. Mishra,...
HPCA
2007
IEEE
15 years 10 months ago
LogTM-SE: Decoupling Hardware Transactional Memory from Caches
This paper proposes a hardware transactional memory (HTM) system called LogTM Signature Edition (LogTM-SE). LogTM-SE uses signatures to summarize a transaction's readand writ...
Luke Yen, Jayaram Bobba, Michael R. Marty, Kevin E...
HPCA
2005
IEEE
15 years 10 months ago
SENSS: Security Enhancement to Symmetric Shared Memory Multiprocessors
With the increasing concern of the security on high performance multiprocessor enterprise servers, more and more effort is being invested into defending against various kinds of a...
Youtao Zhang, Lan Gao, Jun Yang 0002, Xiangyu Zhan...
MOBISYS
2007
ACM
15 years 9 months ago
SmartSiren: virus detection and alert for smartphones
Smartphones have recently become increasingly popular because they provide "all-in-one" convenience by integrating traditional mobile phones with handheld computing devi...
Jerry Cheng, Starsky H. Y. Wong, Hao Yang, Songwu ...
MOBIHOC
2008
ACM
15 years 9 months ago
Complexity in wireless scheduling: impact and tradeoffs
It has been an important research topic since 1992 to maximize stability region in constrained queueing systems, which includes the study of scheduling over wireless ad hoc networ...
Yung Yi, Alexandre Proutiere, Mung Chiang