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100
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GLVLSI
2007
IEEE
15 years 6 months ago
2007
IEEE
We propose an interconnect reorganization algorithm for reduction stages in parallel multipliers. It aims at minimizing power consumption for given static probabilities at the pri...
110
Voted
ICS
2007
Tsinghua U.
15 years 6 months ago
2007
Tsinghua U.
This paper investigates helper threads that improve performance by prefetching data on behalf of an application’s main thread. The focus is data prefetch helper threads that lac...
112
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LCTRTS
2007
Springer
15 years 6 months ago
2007
Springer
Set-associative caches are traditionally managed using hardwarebased lookup and replacement schemes that have high energy overheads. Ideally, the caching strategy should be tailor...
98
Voted
POLICY
2007
Springer
15 years 6 months ago
2007
Springer
We present a discretionary access control framework that can be used to control a principal’s ability to link information from two or more audit records and compromise a user’...
84
Voted
DATE
2006
IEEE
15 years 6 months ago
2006
IEEE
This paper describes a fast-lock mixed-mode delaylocked loop (MMDLL) for wide-range operation and multiphase outputs. The architecture of the proposed DLL uses the mixed-mode time...