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DAGSTUHL
2007
15 years 6 months ago
Some Experiments on Tiling Loop Programs for Shared-Memory Multicore Architectures
The model-based transformation of loop programs is a way of detecting fine-grained parallelism in sequential programs. One of the challenges is to agglomerate the parallelism to a...
Armin Größlinger
DATE
2008
IEEE
182views Hardware» more  DATE 2008»
15 years 11 months ago
An adaptable FPGA-based System for Regular Expression Matching
In many applications string pattern matching is one of the most intensive tasks in terms of computation time and memory accesses. Network Intrusion Detection Systems and DNA Seque...
Ivano Bonesana, Marco Paolieri, Marco D. Santambro...
APSEC
2007
IEEE
15 years 11 months ago
E-AoSAS++ and its Software Development Environment
E-AoSAS++ is an aspect-oriented software architecture style for embedded software. It basically gives the style in which a set of state transition machines organizes a software. W...
Masami Noro, Atsushi Sawada, Yoshinari Hachisu, Ma...
GRID
2005
Springer
15 years 10 months ago
SERVOGrid complexity computational environments (CCE) integrated performance analysis
In this paper we describe the architecture and initial performance analysis results of the SERVOGrid Complexity Computational Environments (CCE). The CCE architecture is based on ...
Galip Aydin, Mehmet S. Aktas, Geoffrey Fox, Harsha...
169
Voted
VLSID
2004
IEEE
292views VLSI» more  VLSID 2004»
16 years 5 months ago
NoCGEN: A Template Based Reuse Methodology for Networks on Chip Architecture
In this paper, we describe NoCGEN, a Network On Chip (NoC) generator, which is used to create a simulatable and synthesizable NoC description. NoCGEN uses a set of modularised rou...
Jeremy Chan, Sri Parameswaran