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ICETET
2009
IEEE
16 years 24 days ago
Low Energy Tree Based Network on Chip Architectures Using Homogeneous Routers for Bandwidth and Latency Constrained Multimedia A
Abstract— Design of Network on chip architectures for multimedia applications is being widely studied. This involves design decisions at various levels of hierarchy. Topology des...
Deepak Majeti, Aditya Pasalapudi, Kishore Yalamanc...
ICOST
2009
Springer
16 years 21 days ago
An Architecture to Combine Context Awareness and Body Sensor Networks for Health Care Applications
Information derived from wearable sensors, such as illness/fall alarms, can be enhanced with context information to provide advanced health care and assisted living applications. I...
Alessia Salmeri, Carlo Alberto Licciardi, Luca Lam...
151
Voted
ICPPW
2003
IEEE
15 years 11 months ago
Parallelization of Cellular Neural Networks for Image Processing on Cluster Architectures
In this paper a simple but effective approach for parallelization of cellular neural networks for image processing is developed. Digital gray-scale images were used to evaluate th...
Thomas Weishäupl, Erich Schikuta
ELPUB
1999
ACM
15 years 10 months ago
The S-Link-S Framework for Reference Linking: Architecture and Implementation
The Scholarly Link Specification (S-Link-S™) Framework has been proposed as a possible approach towards a solution to the reference linking problem. S-Link-S provides a language ...
Eric Hellman
156
Voted
FLAIRS
2008
15 years 8 months ago
An Intelligent Tutoring Architecture for Simulation-Based Training
Truly generic and reusable intelligent tutoring software architectures have remained elusive. As part of our effort to develop tutoring systems for simulations of ill-defined doma...
Dave Gomboc, Mark G. Core, H. Chad Lane, Ashish Ka...