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DAC
2006
ACM
16 years 4 months ago
Efficient SAT-based Boolean matching for FPGA technology mapping
Most FPGA technology mapping approaches either target Lookup Tables (LUTs) or relatively simple Programmable Logic Blocks (PLBs). Considering networks of PLBs during technology map...
Sean Safarpour, Andreas G. Veneris, Gregg Baeckler...
DAC
2006
ACM
16 years 4 months ago
Gain-based technology mapping for minimum runtime leakage under input vector uncertainty
The gain-based technology mapping paradigm has been successfully employed for finding minimum delay and minimum area mappings. However, existing gain-based technology mappers fail...
Ashish Kumar Singh, Murari Mani, Ruchir Puri, Mich...
138
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DAC
2006
ACM
16 years 4 months ago
Statistical timing analysis with correlated non-gaussian parameters using independent component analysis
We propose a scalable and efficient parameterized block-based statistical static timing analysis algorithm incorporating both Gaussian and non-Gaussian parameter distributions, ca...
Jaskirat Singh, Sachin S. Sapatnekar
ICML
1996
IEEE
16 years 4 months ago
Representing and Learning Quality-Improving Search Control Knowledge
Generating good, production-quality plans is an essential element in transforming planners from research tools into real-world applications, but one that has been frequently overl...
M. Alicia Pérez
SIGSOFT
2009
ACM
16 years 4 months ago
Synthesizing partial component-level behavior models from system specifications
Initial system specifications, such as use-case scenarios and properties, only partially specify the future system. We posit that synthesizing partial component-level behavior mod...
Ivo Krka, Yuriy Brun, George Edwards, Nenad Medvid...