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ISLPED
2003
ACM
122views Hardware» more  ISLPED 2003»
15 years 5 months ago
A mixed-clock issue queue design for globally asynchronous, locally synchronous processor cores
Ever shrinking device sizes and innovative micro-architectural and circuit design techniques have made it possible to have multi-million transistor systems running at multi-gigahe...
Venkata Syam P. Rapaka, Diana Marculescu
CONEXT
2005
ACM
15 years 1 months ago
MRS: a simple cross-layer heuristic to improve throughput capacity in wireless mesh networks
Wireless Mesh Networks (WMNs) are an emerging architecture based on multi-hop transmission. ISPs considers WMNs as a potential future technology to offer broadband Internet acces...
Luigi Iannone, Serge Fdida
ICDCS
2005
IEEE
15 years 5 months ago
Optimal Component Composition for Scalable Stream Processing
Stream processing has become increasingly important with emergence of stream applications such as audio/video surveillance, stock price tracing, and sensor data analysis. A challe...
Xiaohui Gu, Philip S. Yu, Klara Nahrstedt
ICDCS
2005
IEEE
15 years 5 months ago
End-to-End Fair Bandwidth Allocation in Multi-Hop Wireless Ad Hoc Networks
— The shared-medium multi-hop nature of wireless ad hoc networks poses fundamental challenges to the design of an effective resource allocation algorithm to maximize spatial reus...
Baochun Li
ICPP
2003
IEEE
15 years 5 months ago
A Hardware-based Cache Pollution Filtering Mechanism for Aggressive Prefetches
Aggressive hardware-based and software-based prefetch algorithms for hiding memory access latencies were proposed to bridge the gap of the expanding speed disparity between proces...
Xiaotong Zhuang, Hsien-Hsin S. Lee