1058 search results - page 70 / 212 » Performance Analysis of Mapping Strategies for Parallel Simu... |
222
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ICDCS
2000
IEEE
15 years 7 months ago
2000
IEEE
We develop and examine job migration policies by considering effective usage of global memory in addition to CPU load sharing in distributed systems. When a node is identified fo...
137
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IPPS
1998
IEEE
15 years 7 months ago
1998
IEEE
In this paper, the effect of switch design on the application performance of cache-coherent non-uniform memory access (CC-NUMA) multiprocessors is studied in detail. Wormhole rout...
118
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ASPDAC
2007
ACM
15 years 7 months ago
2007
ACM
Abstract-- SAT sweeping is the process of merging two or more functionally equivalent nodes in a circuit by selecting one of them to represent all the other equivalent nodes. This ...
141
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ICDCS
1997
IEEE
15 years 7 months ago
1997
IEEE
—The increasing deployment of wireless access technology, along with the emergence of high speed integrated service networks, such as ATM, promises to provide mobile users with u...
114
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FPL
2009
Springer
15 years 8 months ago
2009
Springer
Automated code generation and performance tuning techniques for concurrent architectures such as GPUs, Cell and FPGAs can provide integer factor speedups over multi-core processor...