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JPDC
2011
129views more  JPDC 2011»
14 years 5 months ago
Static timing analysis for modeling QoS in networks-on-chip
Networks-on-chip (NoCs) are used in a growing number of SoCs and multi-core processors. Because messages compete for the NoC’s shared resources, quality of service and resource ...
Evgeni Krimer, Isaac Keslassy, Avinoam Kolodny, Is...
DAC
2002
ACM
15 years 11 months ago
A universal technique for fast and flexible instruction-set architecture simulation
In the last decade, instruction-set simulators have become an essential development tool for the design of new programmable architectures. Consequently, the simulator performance ...
Achim Nohl, Gunnar Braun, Oliver Schliebusch, Rain...
80
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CDC
2008
IEEE
144views Control Systems» more  CDC 2008»
15 years 4 months ago
Control software model checking using bisimulation functions for nonlinear systems
— This paper extends a method for integrating source-code model checking with dynamic system analysis to verify properties of controllers for nonlinear dynamic systems. Source-co...
James Kapinski, Alexandre Donzé, Flavio Ler...
ICCV
2005
IEEE
15 years 3 months ago
Learning Non-Generative Grammatical Models for Document Analysis
— We present a general approach for the hierarchical segmentation and labeling of document layout structures. This approach models document layout as a grammar and performs a glo...
Michael Shilman, Percy Liang, Paul A. Viola
EUROPAR
2000
Springer
15 years 1 months ago
Use of Performance Technology for the Management of Distributed Systems
This paper describes a toolset, PACE, that provides detailed predictive performance information throughout the implementation and execution stages of an application. It is structur...
Darren J. Kerbyson, John S. Harper, Efstathios Pap...