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» Performance Analysis of a Parallel Application in the GRID
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ISCA
2011
IEEE
287views Hardware» more  ISCA 2011»
14 years 1 months ago
Scalable power control for many-core architectures running multi-threaded applications
Optimizing the performance of a multi-core microprocessor within a power budget has recently received a lot of attention. However, most existing solutions are centralized and cann...
Kai Ma, Xue Li, Ming Chen, Xiaorui Wang
DSD
2010
IEEE
161views Hardware» more  DSD 2010»
14 years 10 months ago
Design of Trace-Based Split Array Caches for Embedded Applications
—Since many embedded systems execute a predefined set of programs, tuning system components to application programs and data is the approach chosen by many design techniques to o...
Alice M. Tokarnia, Marina Tachibana
PODC
2005
ACM
15 years 3 months ago
Stochastic analysis of distributed deadlock scheduling
Deadlock detection scheduling is an important, yet oft-overlooked problem that can significantly affect the overall performance of deadlock handling. An excessive initiation of ...
Shigang Chen, Yibei Ling
CCGRID
2008
IEEE
15 years 4 months ago
Admission Control in a Computational Market
We propose, implement and evaluate three admission models for computational Grids. The models take the expected demand into account and offer a specific performance guarantee. Th...
Thomas Sandholm, Kevin Lai, Scott H. Clearwater
ICPP
1993
IEEE
15 years 1 months ago
Scalability Study of the KSR-1
Scalability of parallel architectures is an interesting area of current research. Shared memory parallel programming is attractive stemming from its relative ease in transitioning...
Umakishore Ramachandran, Gautam Shah, Ravi Kumar, ...