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» Performance Analysis of a Parallel Application in the GRID
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2007
IEEE
15 years 1 months ago
A feasibility analysis of power-awareness and energy minimization in modern interconnects for high-performance computing
High-performance computing (HPC) systems consume a significant amount of power, resulting in high operational costs, reduced reliability, and wasting of natural resources. Therefor...
Reza Zamani, Ahmad Afsahi, Ying Qian, V. Carl Hama...
ASAP
2007
IEEE
150views Hardware» more  ASAP 2007»
15 years 1 months ago
Customizing Reconfigurable On-Chip Crossbar Scheduler
We present a design of a customized crossbar scheduler for on-chip networks. The proposed scheduler arbitrates on-demand interconnects, where physical topologies are identical to ...
Jae Young Hur, Todor Stefanov, Stephan Wong, Stama...
CCGRID
2008
IEEE
14 years 11 months ago
A Decentralized and Cooperative Workflow Scheduling Algorithm
In the current approaches to workflow scheduling, there is no cooperation between the distributed workflow brokers and as a result, the problem of conflicting schedules occur. To o...
Rajiv Ranjan, Mustafizur Rahman 0003, Rajkumar Buy...
GLOBECOM
2010
IEEE
14 years 7 months ago
Analytical Modelling of IEEE 802.15.4 for Multi-Hop Networks with Heterogeneous Traffic and Hidden Terminals
IEEE 802.15.4 multi-hop wireless networks are an important communication infrastructure for many applications, including industrial control, home automation, and smart grids. Exist...
Piergiuseppe Di Marco, Pan Gun Park, Carlo Fischio...
FPGA
2004
ACM
119views FPGA» more  FPGA 2004»
15 years 3 months ago
A quantitative analysis of the speedup factors of FPGAs over processors
The speedup over a microprocessor that can be achieved by implementing some programs on an FPGA has been extensively reported. This paper presents an analysis, both quantitative a...
Zhi Guo, Walid A. Najjar, Frank Vahid, Kees A. Vis...