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» Performance Analysis of a Parallel Application in the GRID
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ISPASS
2010
IEEE
15 years 4 months ago
Visualizing complex dynamics in many-core accelerator architectures
—While many-core accelerator architectures, such as today’s Graphics Processing Units (GPUs), offer orders of magnitude more raw computing power than contemporary CPUs, their m...
Aaron Ariel, Wilson W. L. Fung, Andrew E. Turner, ...
IEEEPACT
2009
IEEE
14 years 7 months ago
Region Based Structure Layout Optimization by Selective Data Copying
As the gap between processor and memory continues to grow, memory performance becomes a key performance bottleneck for many applications. Compilers therefore increasingly seek to m...
Sandya S. Mannarswamy, Ramaswamy Govindarajan, Ris...
IEEEPACT
2006
IEEE
15 years 3 months ago
Region array SSA
Static Single Assignment (SSA) has become the intermediate program representation of choice in most modern compilers because it enables efficient data flow analysis of scalars an...
Silvius Rus, Guobin He, Christophe Alias, Lawrence...
MICRO
2003
IEEE
125views Hardware» more  MICRO 2003»
15 years 2 months ago
WaveScalar
Silicon technology will continue to provide an exponential increase in the availability of raw transistors. Effectively translating this resource into application performance, how...
Steven Swanson, Ken Michelson, Andrew Schwerin, Ma...
PAAPP
2006
141views more  PAAPP 2006»
14 years 9 months ago
Algorithmic optimizations of a conjugate gradient solver on shared memory architectures
OpenMP is an architecture-independent language for programming in the shared memory model. OpenMP is designed to be simple and in terms of programming abstractions. Unfortunately,...
Henrik Löf, Jarmo Rantakokko