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LCTRTS
2005
Springer
15 years 5 months ago
Complementing software pipelining with software thread integration
Software pipelining is a critical optimization for producing efficient code for VLIW/EPIC and superscalar processors in highperformance embedded applications such as digital sign...
Won So, Alexander G. Dean
CODES
2007
IEEE
15 years 6 months ago
Compile-time decided instruction cache locking using worst-case execution paths
Caches are notorious for their unpredictability. It is difficult or even impossible to predict if a memory access results in a definite cache hit or miss. This unpredictability i...
Heiko Falk, Sascha Plazar, Henrik Theiling
CODES
2005
IEEE
15 years 6 months ago
DVS for buffer-constrained architectures with predictable QoS-energy tradeoffs
We present a new scheme for dynamic voltage and frequency scaling (DVS) for processing multimedia streams on architectures with restricted buffer sizes. The main advantage of our ...
Alexander Maxiaguine, Samarjit Chakraborty, Lothar...
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SENSYS
2005
ACM
15 years 6 months ago
Sympathy for the sensor network debugger
Being embedded in the physical world, sensor networks present a wide range of bugs and misbehavior qualitatively different from those in most distributed systems. Unfortunately, d...
Nithya Ramanathan, Kevin K. Chang, Rahul Kapur, Le...
OOPSLA
2009
Springer
15 years 7 months ago
Scalable nonblocking concurrent objects for mission critical code
The high degree of complexity and autonomy of future robotic space missions, such as Mars Science Laboratory (MSL), poses serious challenges in assuring their reliability and ef...
Damian Dechev, Bjarne Stroustrup