Sciweavers

472 search results - page 54 / 95
» Performance Evaluation of Memory Caches in Multiprocessors
Sort
View
ISCA
2007
IEEE
146views Hardware» more  ISCA 2007»
15 years 6 months ago
Virtual hierarchies to support server consolidation
Server consolidation is becoming an increasingly popular technique to manage and utilize systems. This paper develops CMP memory systems for server consolidation where most sharin...
Michael R. Marty, Mark D. Hill
HIPEAC
2010
Springer
15 years 1 months ago
Improving Performance by Reducing Aborts in Hardware Transactional Memory
The optimistic nature of Transactional Memory (TM) systems can lead to the concurrent execution of transactions that are later found to conflict. Conflicts degrade scalability, a...
Mohammad Ansari, Behram Khan, Mikel Luján, ...
ICS
1999
Tsinghua U.
15 years 4 months ago
The scalability of multigrain systems
Researchers have recently proposed coupling small- to mediumscale multiprocessors to build large-scale shared memory machines, known as multigrain shared memory systems. Multigrai...
Donald Yeung
ISCA
2010
IEEE
222views Hardware» more  ISCA 2010»
15 years 1 months ago
Cohesion: a hybrid memory model for accelerators
Two broad classes of memory models are available today: models with hardware cache coherence, used in conventional chip multiprocessors, and models that rely upon software to mana...
John H. Kelm, Daniel R. Johnson, William Tuohy, St...
ICCD
2004
IEEE
106views Hardware» more  ICCD 2004»
15 years 8 months ago
Energy Characterization of Hardware-Based Data Prefetching
This paper evaluates several hardware-based data prefetching techniques from an energy perspective, and explores their energy/performance tradeoffs. We present detailed simulation...
Yao Guo, Saurabh Chheda, Israel Koren, C. Mani Kri...