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» Performance Evaluation of View-Oriented Parallel Programming
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EUROPAR
2010
Springer
15 years 4 months ago
Efficient Address Mapping of Shared Cache for On-Chip Many-Core Architecture
Abstract. Performance of the on-chip cache is critical for processor. The multithread program model usually employed by on-chip many-core architectures may have effects on cache ac...
Fenglong Song, Dongrui Fan, Zhiyong Liu, Junchao Z...
ICS
2000
Tsinghua U.
15 years 6 months ago
Compiling object-oriented data intensive applications
Processing and analyzing large volumes of data plays an increasingly important role in many domains of scienti c research. High-level language and compiler support for developing ...
Renato Ferreira, Gagan Agrawal, Joel H. Saltz
HPCA
2007
IEEE
16 years 3 months ago
A Scalable, Non-blocking Approach to Transactional Memory
Transactional Memory (TM) provides mechanisms that promise to simplify parallel programming by eliminating the need for locks and their associated problems (deadlock, livelock, pr...
Hassan Chafi, Jared Casper, Brian D. Carlstrom, Au...
EUROPAR
2005
Springer
15 years 8 months ago
Tolerating Message Latency Through the Early Release of Blocked Receives
Large message latencies often lead to poor performance of parallel applications. In this paper, we investigate a latency-tolerating technique that immediately releases all blocking...
Jian Ke, Martin Burtscher, William Evan Speight
IEEEPACT
2006
IEEE
15 years 9 months ago
Whole-program optimization of global variable layout
On machines with high-performance processors, the memory system continues to be a performance bottleneck. Compilers insert prefetch operations and reorder data accesses to improve...
Nathaniel McIntosh, Sandya Mannarswamy, Robert Hun...