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» Performance Evaluation of the VF Graph Matching Algorithm
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FPGA
2007
ACM
163views FPGA» more  FPGA 2007»
15 years 7 months ago
Improved SAT-based Boolean matching using implicants for LUT-based FPGAs
Boolean matching (BM) is a widely used technique in FPGA resynthesis and architecture evaluation. In this paper we present several improvements to the recently proposed SAT-based ...
Jason Cong, Kirill Minkovich
ISCAPDCS
2003
15 years 2 months ago
Optimal Graph Transformation Assuming Alternate Scheduling Models
Many computation-intensive iterative or recursive applications commonly found in digital signal processing and image processing applications can be represented by data-flow graph...
Timothy W. O'Neil
ICCBR
2003
Springer
15 years 6 months ago
Evaluation of Case-Based Maintenance Strategies in Software Design
CBR applications running in real domains can easily reach thousands of cases, which are stored in the case library. Retrieval times can increase greatly if the retrieval algorithm ...
Paulo Gomes, Francisco C. Pereira, Paulo Paiva, Nu...
ICIP
2000
IEEE
16 years 2 months ago
Image Registration with Minimum Spanning Tree Algorithm
Registration is a fundamental task in image processing and quite a few registration techniques have been developed in various fields. In this paper we propose a novel graphreprese...
Bing Ma, Alfred O. Hero III, John D. Gorman, Olivi...
CVPR
2007
IEEE
16 years 3 months ago
Efficient MRF Deformation Model for Non-Rigid Image Matching
We propose a novel MRF-based model for deformable image matching (also known as registration). The deformation is described by a field of discrete variables, representing displace...
Alexander Shekhovtsov, Ivan Kovtun, Václav ...