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91
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DATE
2009
IEEE
189views Hardware» more  DATE 2009»
15 years 6 months ago
CUFFS: An instruction count based architectural framework for security of MPSoCs
—Multiprocessor System on Chip (MPSoC) architecture is rapidly gaining momentum for modern embedded devices. The vulnerabilities in software on MPSoCs are often exploited to caus...
Krutartha Patel, Sri Parameswaran, Roshan G. Ragel
104
Voted
HPCC
2009
Springer
15 years 4 months ago
On Instruction-Level Method for Reducing Cache Penalties in Embedded VLIW Processors
Usual cache optimisation techniques for high performance computing are difficult to apply in embedded VLIW applications. First, embedded applications are not always well structur...
Samir Ammenouche, Sid Ahmed Ali Touati, William Ja...
97
Voted
ASPLOS
1994
ACM
15 years 3 months ago
Reactive Synchronization Algorithms for Multiprocessors
Synchronization algorithms that are efficient across a wide range of applications and operating conditions are hard to design because their performance depends on unpredictable ru...
Beng-Hong Lim, Anant Agarwal
EUROSYS
2007
ACM
15 years 8 months ago
Melange: creating a "functional" internet
Most implementations of critical Internet protocols are written in type-unsafe languages such as C or C++ and are regularly vulnerable to serious security and reliability problems...
Anil Madhavapeddy, Alex Ho, Tim Deegan, David Scot...
75
Voted
GRID
2005
Springer
15 years 5 months ago
Collective operations for wide-area message passing systems using adaptive spanning trees
Abstract— We propose a method for wide-area message passing systems to perform collective operations using dynamically created spanning trees. In our proposal, broadcasts and red...
Hideo Saito, Kenjiro Taura, Takashi Chikayama