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ISSS
1995
IEEE
161views Hardware» more  ISSS 1995»
15 years 6 months ago
Synthesis of pipelined DSP accelerators with dynamic scheduling
To construct complete systems on silicon, application speci c DSP accelerators are needed to speed up the execution of high throughput DSP algorithms. In this paper, a methodology...
Patrick Schaumont, Bart Vanthournout, Ivo Bolsens,...
ICPP
2009
IEEE
15 years 9 months ago
Integrated Performance Views in Charm++: Projections Meets TAU
Abstract—The Charm++ parallel programming system provides a modular performance interface that can be used to extend its performance measurement and analysis capabilities. The in...
Scott Biersdorff, Chee Wai Lee, Allen D. Malony, L...
ISTA
2007
15 years 3 months ago
Analytical data modeling of investment project financing process
: The present work is devoted to the research of investment projects’ financing issues. Within this paper a data analytical tool for an optimal financing schema computation on th...
Mikhail D. Godlevskiy, Valentina V. Moskalenko, Vl...
IWMM
2010
Springer
137views Hardware» more  IWMM 2010»
15 years 6 months ago
The locality of concurrent write barriers
Concurrent and incremental collectors require barriers to ensure correct synchronisation between mutator and collector. The overheads imposed by particular barriers on particular ...
Laurence Hellyer, Richard Jones, Antony L. Hosking
ICFP
2002
ACM
16 years 2 months ago
A demand-driven adaptive type analysis
Compilers for dynamically and statically typed languages ensure safe execution by verifying that all operations are performed on appropriate values. An operation as simple as car ...
Danny Dubé, Marc Feeley