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FPL
2005
Springer
131views Hardware» more  FPL 2005»
15 years 5 months ago
An Efficient Approach to Hide the Run-Time Reconfiguration from SW Applications
Dynamically reconfigurable logic is becoming an important design unit in SoC system. A method to make the reconfiguration management transparent to software applications is requir...
Yang Qu, Juha-Pekka Soininen, Jari Nurmi
ISLPED
2003
ACM
155views Hardware» more  ISLPED 2003»
15 years 5 months ago
Low-power high-level synthesis for FPGA architectures
This paper addresses two aspects of low-power design for FPGA circuits. First, we present an RT-level power estimator for FPGAs with consideration of wire length. The power estima...
Deming Chen, Jason Cong, Yiping Fan
IEEEPACT
2006
IEEE
15 years 5 months ago
Complexity-based program phase analysis and classification
Modeling and analysis of program behavior are at the foundation of computer system design and optimization. As computer systems become more adaptive, their efficiency increasingly...
Chang-Burm Cho, Tao Li
SP
2003
IEEE
116views Security Privacy» more  SP 2003»
15 years 5 months ago
Garbage Collector Memory Accounting in Language-Based Systems
Language run-time systems are often called upon to safely execute mutually distrustful tasks within the same runtime, protecting them from other tasks’ bugs or otherwise hostile...
David W. Price, Algis Rudys, Dan S. Wallach
ICS
2007
Tsinghua U.
15 years 5 months ago
Optimization of data prefetch helper threads with path-expression based statistical modeling
This paper investigates helper threads that improve performance by prefetching data on behalf of an application’s main thread. The focus is data prefetch helper threads that lac...
Tor M. Aamodt, Paul Chow