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SDL
2003
147views Hardware» more  SDL 2003»
15 years 5 months ago
Modelling and Evaluation of a Network on Chip Architecture Using SDL
Network on Chip (NoC) is a new paradigm for designing large and complex systems on chips (SoCs). In this paradigm, a packet switched network is provided for on-chip communication. ...
Rickard Holsmark, Magnus Högberg, Shashi Kuma...
ACMSE
2006
ACM
15 years 10 months ago
Assessing denial of service vulnerabilities in DOCSIS
In previous work a DOCSIS model was added to ‘ns’ to allow simulations to be run to analyze the performance of DOCSIS. These simulations showed that congestion caused by the a...
Scott Moser, Jim Martin
ICML
2009
IEEE
15 years 11 months ago
Active learning for directed exploration of complex systems
Physics-based simulation codes are widely used in science and engineering to model complex systems that would be infeasible to study otherwise. Such codes provide the highest-fid...
Michael C. Burl, Esther Wang
ICCAD
2001
IEEE
108views Hardware» more  ICCAD 2001»
16 years 1 months ago
Placement Driven Retiming with a Coupled Edge Timing Model
Retiming is a widely investigated technique for performance optimization. It performs powerful modifications on a circuit netlist. However, often it is not clear, whether the pred...
Ingmar Neumann, Wolfgang Kunz
FDL
2007
IEEE
15 years 10 months ago
Modelling Alternatives for Cycle Approximate Bus TLMs
Transaction level models (TLMs) can be constructed at t levels of abstraction, denoted as untimed (UT), cycle-approximate (CX), and cycle accurate (CA) in this paper. The choice o...
Martin Radetzki, Rauf Salimi Khaligh