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DATE
2007
IEEE
111views Hardware» more  DATE 2007»
15 years 6 months ago
CATS: cycle accurate transaction-driven simulation with multiple processor simulators
This paper focuses on enhancing performance of cycle accurate simulation with multiple processor simulators. Simulation performance is determined by how often simulators exchange ...
Dohyung Kim, Soonhoi Ha, Rajesh Gupta
CAL
2011
13 years 11 months ago
DRAMSim2: A Cycle Accurate Memory System Simulator
—In this paper we present DRAMSim2, a cycle accurate memory system simulator. The goal of DRAMSim2 is to be an accurate and publicly available DDR2/3 memory system model which ca...
Paul Rosenfeld, Elliott Cooper-Balis, Bruce Jacob
VLSISP
2008
134views more  VLSISP 2008»
14 years 11 months ago
Calibration of Abstract Performance Models for System-Level Design Space Exploration
ion of Abstract Performance Models for System-Level Design Space Exploration ANDY D. PIMENTEL, MARK THOMPSON, SIMON POLSTRA AND CAGKAN ERBAS Computer Systems Architecture Group, In...
Andy D. Pimentel, Mark Thompson, Simon Polstra, Ca...
CMG
2003
15 years 1 months ago
{Performance Modeling and Evaluation of Large-Scale J2EE Applications
The queueing Petri net (QPN) paradigm provides a number of benefits over conventional modeling paradigms such as queueing networks and generalized stochastic Petri nets. Using qu...
Samuel Kounev, Alejandro P. Buchmann
HPCA
2006
IEEE
16 years 5 days ago
Construction and use of linear regression models for processor performance analysis
Processor architects have a challenging task of evaluating a large design space consisting of several interacting parameters and optimizations. In order to assist architects in ma...
P. J. Joseph, Kapil Vaswani, Matthew J. Thazhuthav...