5564 search results - page 227 / 1113 » Performance Modeling of HPC Applications |
124
Voted
ANSS
2004
IEEE
15 years 7 months ago
2004
IEEE
To enable optimizations in memory access behavior of high performance applications, cache monitoring is a crucial process. Simulation of cache hardware is needed in order to allow...
134
click to vote
WWW
2005
ACM
16 years 4 months ago
2005
ACM
This paper proposes the AN.P2P architecture to facilitate efficient peer-to-peer content delivery with heterogeneous presentation requirements. In general, the AN.P2P enables a pe...
136
click to vote
DATE
2008
IEEE
15 years 10 months ago
2008
IEEE
Efficient use of the memory hierarchy is critical for achieving high performance in a multiprocessor systemon-chip. An external memory that is shared between processors is a bottl...
132
click to vote
DSN
2000
IEEE
15 years 8 months ago
2000
IEEE
This paper describes the OFTT (OLE Fault Tolerance Technology), a fault tolerance middleware toolkit running on the Microsoft Windows NT operating system that provides required fa...
136
click to vote
ISSS
2000
IEEE
15 years 8 months ago
2000
IEEE
Even though high-level hardware synthesis from dataflow graphs becomes popular in designing DSP systems, currently used dataflow models are inefficient to deal with emerging multi...