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FPL
2003
Springer
95views Hardware» more  FPL 2003»
15 years 9 months ago
A Model for Hardware Realization of Kernel Loops
Abstract. Hardware realization of kernel loops holds the promise of accelerating the overall application performance and is therefore an important part of the synthesis process. In...
Jirong Liao, Weng-Fai Wong, Tulika Mitra
WMPI
2004
ACM
15 years 9 months ago
An analytical model for software-only main memory compression
Abstract. Many applications with large data spaces that cannot run on a typical workstation (due to page faults) call for techniques to expand the effective memory size. One such t...
Irina Chihaia, Thomas R. Gross
SDM
2012
SIAM
322views Data Mining» more  SDM 2012»
13 years 6 months ago
Adaptive Multi-task Sparse Learning with an Application to fMRI Study
In this paper, we consider the multi-task sparse learning problem under the assumption that the dimensionality diverges with the sample size. The traditional l1/l2 multi-task lass...
Xi Chen, Jingrui He, Rick Lawrence, Jaime G. Carbo...
HPCN
1995
Springer
15 years 7 months ago
Mermaid: modelling and evaluation research in MIMD architecture design
The Mermaid project focuses on the construction of simulation models for MIMD multi-computers in order to evaluate them and to give estimates of the system’s performance. A multi...
Andy D. Pimentel, J. van Brummen, T. Papathanassia...
155
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IPPS
2006
IEEE
15 years 10 months ago
A high level SoC power estimation based on IP modeling
Current electronic system design requires to be concerned with power consumption consideration. However, in a lot of design tools, the application power consumption budget is esti...
David Elléouet, Nathalie Julien, Dominique ...