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CSE
2011
IEEE
13 years 9 months ago
Performance Enhancement of Network Devices with Multi-Core Processors
— In network based applications, packet capture is the main area that attracts many researchers in developing traffic monitoring systems. Along with the packet capture, many othe...
Nhat-Phuong Tran, Sugwon Hong, Myungho Lee, Seung-...
CCGRID
2009
IEEE
15 years 4 months ago
Performance under Failures of DAG-based Parallel Computing
— As the scale and complexity of parallel systems continue to grow, failures become more and more an inevitable fact for solving large-scale applications. In this research, we pr...
Hui Jin, Xian-He Sun, Ziming Zheng, Zhiling Lan, B...
ACIVS
2005
Springer
15 years 3 months ago
Designing Area and Performance Constrained SIMD/VLIW Image Processing Architectures
Abstract. Image processing is widely used in many applications, including medical imaging, industrial manufacturing and security systems. In these applications, the size of the ima...
Hamed Fatemi, Henk Corporaal, Twan Basten, Richard...
IPPS
2006
IEEE
15 years 3 months ago
SmartNetSolve: high-level programming system for high performance grid computing
The paper presents SmartNetSolve, an extension of NetSolve, the programming system for high performance Grid computing. The extension is aimed at higher performance of Grid applic...
Thomas Brady, E. Konstantinov, Alexey L. Lastovets...
EURODAC
1994
IEEE
116views VHDL» more  EURODAC 1994»
15 years 1 months ago
A performance evaluator for parameterized ASIC architectures
System-levelpartitioning assigns functionalobjects such as tasks or code segments to system-level components such as o-the-shelf processors or application-speci c architectures in...
Jie Gong, Daniel D. Gajski, Alex Nicolau