439 search results - page 21 / 88 » Performance Modeling of MANET Interconnectivity |
ICCAD
2008
IEEE
15 years 6 months ago
2008
IEEE
— As Double Patterning Technology (DPT) becomes the only solution for 32-nm lithography process, we need to investigate how DPT affects the performance of a chip. In this paper, ...
DATE
2003
IEEE
15 years 2 months ago
2003
IEEE
In today’s deep-submicron designs, the interconnect delays contribute an increasing part to the overall performance of an implementation. Particularly when targeting field prog...
PCRCW
1997
Springer
15 years 1 months ago
1997
Springer
High performance portable and space-borne systems continue to demand increasing computation speeds while concurrently attempting to satisfy size, weight, and power constraints. As...
ICCAD
2004
IEEE
15 years 6 months ago
2004
IEEE
Thermal effects are becoming a limiting factor in highperformance circuit design due to the strong temperaturedependence of leakage power, circuit performance, IC package cost and...
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PPL
2008
14 years 9 months ago
2008
This paper investigates the influence of the interconnection network topology of a parallel system on the delivery time of an ensemble of messages, called the communication scheme...