Sciweavers

439 search results - page 23 / 88
» Performance Modeling of MANET Interconnectivity
Sort
View
ASPDAC
2005
ACM
100views Hardware» more  ASPDAC 2005»
14 years 11 months ago
Microarchitecture evaluation with floorplanning and interconnect pipelining
— As microprocessor technology continues to scale into the nanometer regime, recent studies show that interconnect delay will be a limiting factor for performance, and multiple c...
Ashok Jagannathan, Hannah Honghua Yang, Kris Konig...
MJ
2007
82views more  MJ 2007»
14 years 9 months ago
Distortion of pulsed signals in carbon nanotube interconnects
This paper investigates the distortion of DC and radio frequency (RF) pulsed signals in carbon nanotube interconnects. A modified transmission line model for single-walled carbon...
Xiaomeng Shi, Kiat Seng Yeo, Jianguo Ma, Manh Anh ...
ANSS
2006
IEEE
15 years 3 months ago
Performance Study of End-to-End Traffic-Aware Routing
There has been a lot research effort on developing reactive routing algorithms for mobile ad hoc networks (MANETs) over the past few years. Most of these algorithms consider findi...
Raad S. Al-Qassas, Lewis M. Mackenzie, Mohamed Oul...
67
Voted
LCN
2000
IEEE
15 years 1 months ago
Reliability Modeling of SCI Ring-Based Topologies
Performance evaluation and reliability prediction are two important factors in the study of multiprocessor and cluster interconnects. One such interconnect is the Scalable Coheren...
M. A. Sarwar, Alan D. George, David E. Collins
DATE
2003
IEEE
154views Hardware» more  DATE 2003»
15 years 2 months ago
Packetized On-Chip Interconnect Communication Analysis for MPSoC
Interconnect networks play a critical role in shared memory multiprocessor systems-on-chip (MPSoC) designs. MPSoC performance and power consumption are greatly affected by the pac...
Terry Tao Ye, Luca Benini, Giovanni De Micheli