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» Performance Modeling of MANET Interconnectivity
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ET
2007
101views more  ET 2007»
14 years 9 months ago
Towards Nanoelectronics Processor Architectures
In this paper, we focus on reliability, one of the most fundamental and important challenges, in the nanoelectronics environment. For a processor architecture based on the unreliab...
Wenjing Rao, Alex Orailoglu, Ramesh Karri
103
Voted
ICCAD
1997
IEEE
137views Hardware» more  ICCAD 1997»
15 years 1 months ago
Optimization techniques for high-performance digital circuits
The relentless push for high performance in custom digital circuits has led to renewed emphasis on circuit optimization or tuning. The parameters of the optimization are typically...
Chandramouli Visweswariah
75
Voted
PERCOM
2009
ACM
15 years 4 months ago
A Dynamic Platform for Runtime Adaptation
—We present a middleware platform for assembling pervasive applications that demand fault-tolerance and adaptivity in distributed, dynamic environments. Unlike typical adaptive m...
Hubert Pham, Justin Mazzola Paluska, Umar Saif, Ch...
ICASSP
2009
IEEE
15 years 4 months ago
Multi-channel audio segmentation for continuous observation and archival of large spaces
In most real-world situations, a single microphone is insufficient for the characterization of an entire auditory scene. This often occurs in places such as office environments ...
Gordon Wichern, Harvey D. Thornburg, Andreas Spani...
IPPS
2005
IEEE
15 years 3 months ago
Technology-based Architectural Analysis of Operand Bypass Networks for Efficient Operand Transport
As semiconductor feature sizes decrease, interconnect delay is becoming a dominant component of processor cycle times. This creates a critical need to shift microarchitectural des...
Hongkyu Kim, D. Scott Wills, Linda M. Wills