Sciweavers

439 search results - page 79 / 88
» Performance Modeling of MANET Interconnectivity
Sort
View
COMPUTER
2002
129views more  COMPUTER 2002»
14 years 9 months ago
Networks on Chips: A New SoC Paradigm
of abstraction and coarse granularity and distributed communication control. Focusing on using probabilistic metrics such as average values or variance to quantify design objective...
Luca Benini, Giovanni De Micheli
PC
2011
318views Management» more  PC 2011»
14 years 4 months ago
High-performance message-passing over generic Ethernet hardware with Open-MX
In the last decade, cluster computing has become the most popular high-performance computing architecture. Although numerous technological innovations have been proposed to improv...
Brice Goglin
DAC
2006
ACM
14 years 11 months ago
A fast HW/SW FPGA-based thermal emulation framework for multi-processor system-on-chip
With the growing complexity in consumer embedded products and the improvements in process technology, Multi-Processor SystemOn-Chip (MPSoC) architectures have become widespread. T...
David Atienza, Pablo Garcia Del Valle, Giacomo Pac...
DSD
2002
IEEE
96views Hardware» more  DSD 2002»
15 years 2 months ago
Networks on Silicon: Blessing or Nightmare?
Continuing VLSI technology scaling raises several deep submicron (DSM) problems like relatively slow interconnect, power dissipation and distribution, and signal integrity. Those ...
Paul Wielage, Kees G. W. Goossens
ASAP
2011
IEEE
233views Hardware» more  ASAP 2011»
13 years 9 months ago
Accelerating vision and navigation applications on a customizable platform
—The domain of vision and navigation often includes applications for feature tracking as well as simultaneous localization and mapping (SLAM). As these problems require computati...
Jason Cong, Beayna Grigorian, Glenn Reinman, Marco...