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» Performance Modelling of the Computational Hardware: A Stati...
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70
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DATE
1998
IEEE
89views Hardware» more  DATE 1998»
15 years 5 months ago
Characterization-Free Behavioral Power Modeling
We propose a new approach to RT-level power modeling for combinationalmacros, that does not require simulationbased characterization. A pattern-dependent power model for a macro i...
Alessandro Bogliolo, Luca Benini, Giovanni De Mich...
94
Voted
ICCD
2001
IEEE
154views Hardware» more  ICCD 2001»
15 years 9 months ago
Performance Optimization By Wire and Buffer Sizing Under The Transmission Line Model
As the operating frequency increases to Giga Hertz and the rise time of a signal is less than or comparable to the time-of-flight delay of a line, it is necessary to consider the...
Tai-Chen Chen, Song-Ra Pan, Yao-Wen Chang
GLOBECOM
2009
IEEE
14 years 10 months ago
Performance Modeling for Heterogeneous Wireless Networks with Multiservice Overflow Traffic
Performance modeling is important for the purpose of developing efficient dimensioning tools for large complicated networks. But it is difficult to achieve in heterogeneous wireles...
Qian Huang, King-Tim Ko, Villy Bæk Iversen
ET
2007
101views more  ET 2007»
15 years 21 days ago
Towards Nanoelectronics Processor Architectures
In this paper, we focus on reliability, one of the most fundamental and important challenges, in the nanoelectronics environment. For a processor architecture based on the unreliab...
Wenjing Rao, Alex Orailoglu, Ramesh Karri
112
Voted
ASPDAC
2007
ACM
144views Hardware» more  ASPDAC 2007»
15 years 4 months ago
Parameter Reduction for Variability Analysis by Slice Inverse Regression (SIR) Method
With semiconductor fabrication technologies scaled below 100 nm, the design-manufacturing interface becomes more and more complicated. The resultant process variability causes a nu...
Alexander V. Mitev, Michael Marefat, Dongsheng Ma,...