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» Performance Modelling of the Computational Hardware: A Stati...
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113
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ICCAD
2004
IEEE
128views Hardware» more  ICCAD 2004»
15 years 9 months ago
Power estimation for cycle-accurate functional descriptions of hardware
— Cycle-accurate functional descriptions (CAFDs) are being widely adopted in integrated circuit (IC) design flows. Power estimation can potentially benefit from the inherent in...
Lin Zhong, Srivaths Ravi, Anand Raghunathan, Niraj...
ASPDAC
2008
ACM
106views Hardware» more  ASPDAC 2008»
15 years 2 months ago
Hierarchical Krylov subspace reduced order modeling of large RLC circuits
In this paper, we propose a new model order reduction approach for large interconnect circuits using hierarchical decomposition and Krylov subspace projection-based model order re...
Duo Li, Sheldon X.-D. Tan
100
Voted
ICCAD
2003
IEEE
127views Hardware» more  ICCAD 2003»
15 years 9 months ago
Performance Efficiency of Context-Flow System-on-Chip Platform
Recent efforts in adapting computer networks into system-on-chip (SOC), or network-on-chip, present a setback to the traditional computer systems for the lack of effective program...
Rami Beidas, Jianwen Zhu
101
Voted
BMCBI
2008
153views more  BMCBI 2008»
15 years 28 days ago
How to make the most of NE dictionaries in statistical NER
Background: When term ambiguity and variability are very high, dictionary-based Named Entity Recognition (NER) is not an ideal solution even though large-scale terminological reso...
Yutaka Sasaki, Yoshimasa Tsuruoka, John McNaught, ...
119
Voted
CVPR
2004
IEEE
16 years 2 months ago
Probability Models for High Dynamic Range Imaging
Methods for expanding the dynamic range of digital photographs by combining images taken at different exposures have recently received a lot of attention. Current techniques assum...
Chris Pal, Richard Szeliski, Matthew Uyttendaele, ...