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IEEEPACT
2007
IEEE
15 years 7 months ago
A Loop Correlation Technique to Improve Performance Auditing
Performance auditing is an online optimization strategy that empirically measures the effectiveness of an optimization on a particular code region. It has the potential to greatly...
Jeremy Lau, Matthew Arnold, Michael Hind, Brad Cal...
ISCAS
2005
IEEE
191views Hardware» more  ISCAS 2005»
15 years 6 months ago
Behavioural modeling and simulation of a switched-current phase locked loop
Recent work has shown that the use of switched current methods can provide an effective route to implementation of analog IC functionality using a standard digital CMOS process. Fu...
Peter R. Wilson, Reuben Wilcock
DAC
2007
ACM
16 years 2 months ago
Fast Second-Order Statistical Static Timing Analysis Using Parameter Dimension Reduction
The ability to account for the growing impacts of multiple process variations in modern technologies is becoming an integral part of nanometer VLSI design. Under the context of ti...
Zhuo Feng, Peng Li, Yaping Zhan
CGA
2005
15 years 1 months ago
Hardware-Assisted Feature Analysis and Visualization of Procedurally Encoded Multifield Volumetric Data
Procedural encoding of scattered and unstructured scalar datasets using Radial Basis Functions (RBF) is an active area of research with great potential for compactly representing ...
Manfred Weiler, Ralf P. Botchen, Simon Stegmaier, ...
IEEEPACT
2007
IEEE
15 years 7 months ago
JudoSTM: A Dynamic Binary-Rewriting Approach to Software Transactional Memory
With the advent of chip-multiprocessors, we are faced with the challenge of parallelizing performance-critical software. Transactional memory (TM) has emerged as a promising progr...
Marek Olszewski, Jeremy Cutler, J. Gregory Steffan